Title |
Introduction to Advanced Cluster Architectures |
Abstract |
Advanced clusters for High Performance Computing (HPC), such as the Frontera and Stampede2 supercomputers run by the Texas Advanced Computing Center (TACC), are powered by a large number of multi-core processors, abundant memory and cache, and fast interconnects. The Frontera and Stampede2 supercomputers use processors from the Intel Xeon Scalable Processor (SP) product line: Stampede2 is built in part using Intel Skylake processors, and Frontera leverages Intel Cascade Lake chips. This topic presents the salient characteristics of these clusters and of both these processors, which represent the first two generations of the Intel Xeon Scalable Processor product line. Stampede2 also contains nodes based on a third-generation SP processor, Ice Lake, which were added in 2022. While we focus on the earlier Intel Xeon Scalable Processors, much of the material in this topic is generally applicable to other advanced cluster architectures built out of a large number of multi-core nodes, providing information on how to effectively use such hardware and scale applications for larger problem sizes. |
Authors |
['Chris Myers, Steve Lantz'] |
Expertise Level |
None |
Learning Outcome |
None |
Learning Resource Type |
asynchronous online training |
Target Group |
['Researchers', 'Research groups', 'Student'] |
Keywords |
['processors', 'compiler', 'memory', 'scalability', 'optimization', 'OpenMP', 'Intel Xeon', 'MPI'] |
Cost |
None |
Duration |
240 |
Language |
en |
License |
None |
Resource URL Type |
URL |
Start Datetime |
None |
URL |
https://cvw.cac.cornell.edu/clusterarch |
Version Date |
2022-01 |
Provider ID |
urn:ogf.org:glue2:access-ci.org:resource:cider:infrastructure.organizations:898 |
Rating |
None |